set NIOS_RAM_WIDTH		12
set COD_RAM_ADDR_WIDTH		8
set X_NODE_NUM			4
set Y_NODE_NUM			4
set NIOS2_RESET_ADDR 		"4000"
set SDRAM_EN			1
set SDRAM_ADDR_WIDTH		25
set SDRAM_SW_X_ADDR		1
set SDRAM_SW_Y_ADDR		0
set SDRAM_NIC_CONNECT_PORT	0	
set JTAG_INTERFACE_EN		1
set JTAG_SW_X_ADDR		0
set JTAG_SW_Y_ADDR		0
set JTAG_NIC_CONNECT_PORT	0



set JTAG_START_LOC		7
set JTAG_RAM_RW_LOC		6
set JTAG_LAST_PART_LOC		5
set JTAG_FIRST_PART_LOC		4
set JTAG_START_RD_LOC		3
set JTAG_START_WR_LOC		2
set JTAG_PROG_START_LOC		1  
set JTAG_NIOS_RST_LOC		0


set START_CODE			[expr 			(1<<$JTAG_START_LOC)]
set RESET_CODE			[expr $START_CODE + 	(1<<$JTAG_NIOS_RST_LOC)]
set BODY_PROG_CODE		[expr $RESET_CODE + 	(1<<$JTAG_PROG_START_LOC)]
set FIRST_PROG_CODE		[expr $BODY_PROG_CODE + (1<<$JTAG_FIRST_PART_LOC)]
set TAIL_PROG_CODE		[expr $BODY_PROG_CODE + (1<<$JTAG_LAST_PART_LOC)]
set SDRAM_RW_CODE		[expr $RESET_CODE + 	(1<<$JTAG_RAM_RW_LOC)]
set WRITE_CODE_R		[expr $RESET_CODE + 	(1<<$JTAG_START_WR_LOC)]
set READ_CODE_R			[expr $RESET_CODE + 	(1<<$JTAG_START_RD_LOC)]

set WRITE_CODE			[expr $START_CODE +   	(1<<$JTAG_START_WR_LOC)]
set READ_CODE			[expr $START_CODE + 	(1<<$JTAG_START_RD_LOC)]


set TOTAL_CORE_NUM	[expr $X_NODE_NUM * $Y_NODE_NUM]	


proc log2 {N} {
	
	global X_NODE_NUM
	global Y_NODE_NUM
	 if { $N == 0 }  {
	   return 0
	 } else {
	 	set N [expr $N-1]
         	set log 0
         	while {$N>0} {
			 set N [expr $N >> 1 ] 
			 incr log	
		}
       		return $log
	}     
}

set 	X_NODE_NUM_WIDTH	[log2 { $X_NODE_NUM 	}]
set	Y_NODE_NUM_WIDTH	[log2 {	$Y_NODE_NUM	}]


proc update_cmd_mem { des_x_addr des_y_addr jtag_mem_start_addr pckt_size sdram_start_addr } {
		global Y_NODE_NUM_WIDTH
		set CORE_ADDR [expr ((($des_x_addr << $Y_NODE_NUM_WIDTH) + $des_y_addr) )]
		set code_hex  [format %4.8X $sdram_start_addr][format %4.8X $pckt_size][format %4.8X $jtag_mem_start_addr][format %4.8X $CORE_ADDR]
		write_content_to_memory -instance_index 1 -start_address 1 -word_count 4 -content $code_hex -content_in_hex
}

proc send_cmd { command } {
	set code_hex  [format %4.8X $command]
	write_content_to_memory -instance_index 1 -start_address 0 -word_count 1 -content $code_hex -content_in_hex

	set done	0
	set count	0
	while { $done ==  0 && $count <20 } {
		set read_status  [ read_content_from_memory -instance_index 1 -start_address 0 -word_count 1 ]
                set done [string index $read_status 1]
                incr count
		#puts $prog_done 
		#puts $read_status
	}


	if { $count > 19} {
		return 1
		
	} else {

		return 0
	}

}





proc write_read_req { jtag_mem_start_addr  pckt_size  sdram_start_addr} {
	global SDRAM_SW_X_ADDR
	global SDRAM_SW_Y_ADDR
	set code_hex  [format %4.8X $pckt_size][format %4.8X $sdram_start_addr]
	write_content_to_memory -instance_index 0 -start_address $jtag_mem_start_addr -word_count 2 -content $code_hex -content_in_hex
	update_cmd_mem  $SDRAM_SW_X_ADDR $SDRAM_SW_Y_ADDR $jtag_mem_start_addr 2 0
}



